FIG. 1 shows an overall configuration of a conventional audio/video data transmission and reception system. On the transmitting side, transmitter audio/video data to be sent out are input to an audio/video encoder 1. In turn, the audio/video encoder 1 compresses the input transmitter audio/video data illustratively in MPEG format based on a clock frequency generated by a transmission clock generation circuit 2 such as a crystal oscillator. The compressed data are accumulated in a transmission buffer 3 to absorb clock frequency differences. Every time a transmission device 4 sends data to a reception device 5, the transmission buffer 3 replenishes the transmission device 4 with more data. Before transmission, the transmission device 4 subjects the transmitter data to such processes as code conversion and modulation.
On the receiving side, the reception device 5 receives the transmitter data from the transmission device 4 and restores the original data by subjecting the received data to such processes as demodulation and decoding. The restored data are accumulated in a reception buffer 6. It is assumed that the data transfer rate between the transmission device 4 and the reception device 5 is sufficiently higher than the transfer rate of the audio/video data. From the reception buffer 6, the data are forwarded to an audio/video decoder 7 in properly timed relation with processing of the latter. The audio/video decoder 7 decodes (i.e., decompresses) the data in accordance with a clock frequency generated by a reception clock generation circuit 8.
With the system in FIG. 1, it is difficult to keep the transmission clock frequency input to the audio/video encoder 1 exactly the same as the reception clock frequency entered into the audio/video decoder 7 because of variations in component parameters incurred during manufacturing. The resulting difference in processing speeds causes data overflows and underflows in the reception buffer 6, as will be discussed later with reference to FIGS. 2A through 2F and 3A through 3F. The fluctuating flow of data causes the audio/video decoder 7 to develop irregularities in reproducing the video or audio data.
FIGS. 2A through 2F illustrate how a data overflow occurs. An audio/video encoder synchronizing clock (FIG. 2A) is generated internally by the audio/video encoder 1 in keeping with the transmission clock generated by the transmission clock generation circuit 2. In synchronism with leading edges of the clock, encoded audio/video data Dn (FIG. 2B) of a fixed length each are accumulated in the transmission buffer 3 (of a two-packet size).
Transmitter data Dn are received by the reception device 5 following a predetermined transmission delay (FIG. 2C) and are accumulated in the reception buffer 6 (FIG. 2D). Receiver data Dn are forwarded from the reception buffer 6 to the audio/video decoder 7 (FIG. 2F) whereby the data are decoded and output as receiver audio/video data.
An audio/video decoder synchronizing clock (FIG. 2E) is generated internally by the audio/video decoder 7 in accordance with the reception clock generated by the reception clock generation circuit 8. The data input in synchronism with each leading edge of the clock are decoded by the audio/video decoder 7. In this example, the audio/video decoder synchronizing clock (FIG. 2E) is lower in frequency than the audio/video encoder synchronizing clock (FIG. 2A), so that a data overflow takes place when receiver data Dn+5 are placed into the reception buffer 6.
FIGS. 3A through 3F depict how a data underflow occurs. Audio/video data are processed in the same manner as with the case in FIGS. 2A through 2F. In this example, the audio/video decoder synchronizing clock (FIG. 3E) is higher in frequency than the audio/video encoder synchronizing clock (FIG. 3A), so that the reception buffer 6 is vacated before the reception of subsequent receiver data Dn+3 (FIG. 3D). With the reception buffer 6 incapable of transferring data to the audio/video decoder 7 at a leading edge of the audio/video decoder synchronizing clock (FIG. 3F), a data underflow takes place.